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LTM4605
APPLICATIONS INFORMATION
The PLLFLTR pin can be grounded to lower the frequency
Table 2 shows the different operation modes.
to 200kHz or tied to 2.4V to yield approximately 400kHz.
When PLLFLTR is left open, the PLLFLTR pin goes low,
forcing the oscillator to its minimum frequency.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 2. As the operating frequency
Table 2. Different Operating Modes
FCB PIN BUCK
0V to 0.75V Force Continuous Mode
0.85V to Skip-Cycle Mode
V INTVCC – 1V
BOOST
Force Continuous Mode
Burst Mode Operation
increases, the gate charge losses will be higher, thus the
>5.3V
DCM with Constant Freq
DCM with Constant Freq
ef?ciency is lower. The maximum switching frequency is
approximately 400kHz.
450
400
350
300
250
200
150
100
50
When the FCB pin voltage is lower than 0.8V, the controller
behaves as a continuous, PWM current mode synchronous
switching regulator. When the FCB pin voltage is below
V INTVCC – 1V, but greater than 0.85V, where V INTVCC is 6V,
the controller enters Burst Mode operation in boost opera-
tion or enters skip-cycle mode in buck operation. During
boost operation, Burst Mode operation is activated if the
load current is lower than the preset minimum output
current level. The MOSFETs will turn on for several cycles,
followed by a variable “sleep” interval depending upon the
load current. During buck operation, skip-cycle mode sets
0
0
0.5
1.0 1.5
2.0
2.5
a minimum positive inductor current level. In this mode,
PLLFLTR PIN VOLTAGE (V)
4605 F02
some cycles will be skipped when the output load current
Figure 2. Frequency vs PLLFLTR Pin Voltage
FREQUENCY SYNCHRONIZATION
The LTM4605 can also be synchronized to an external
source via the PLLIN pin instead of adjusting the voltage on
the PLLFLTR pin directly. The power module has a phase-
locked loop comprised of an internal voltage controlled
oscillator and a phase detector. This allows turning on the
internal top MOSFET for locking to the rising edge of the
external clock. A pulse detection circuit is used to detect
a clock on the PLLIN pin to turn on the phase lock loop.
The input pulse width of the clock has to be at least 400ns,
and 2V in amplitude. The synchronized frequency ranges
from 200kHz to 400kHz, corresponding to a DC voltage
input from 0V to 2.4V at PLLFLTR. During the start-up of
the regulator, the phase-lock loop function is disabled.
Low Current Operation
To improve the ef?ciency at low output current operation,
LTM4605 provides three modes for both buck and boost
operations by accepting a logic input on the FCB pin.
drops below 1% of the maximum designed load in order
to maintain the output voltage.
When the FCB pin is tied to the INTV CC pin, the controller
enters constant frequency discontinuous current mode
(DCM). For boost operation, if the output voltage is high
enough, the controller can enter the continuous current
buck mode for one cycle to discharge inductor current.
In the following cycle, the controller will resume DCM
boost operation. For buck operation, constant frequency
discontinuous current mode is turned on if the preset
minimum negative inductor current level is reached. At
very light loads, this constant frequency operation is not as
ef?cient as Burst Mode operation or skip-cycle, but does
provide low noise, constant frequency operation.
Input Capacitors
In boost mode, since the input current is continuous, only
minimum input capacitors are required. However, the input
current is discontinuous in buck mode, so the selection
of input capacitor C IN is driven by the need of ?ltering the
input square wave current.
4605fc
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